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India Progresses in Training Semiconductor Design Engineers: Minister

Indian Community Editorial TeamBy Indian Community Editorial TeamMarch 7, 20262 Mins ReadNo Comments Add us to Google Preferred Sources
India Progresses in Training Semiconductor Design Engineers: Minister
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India has been advancing towards its goal of training 85,000 semiconductor design engineers through the Chips to Startups (C2S) initiative, as stated by Union Minister Ashwini Vaishnaw. The government is emphasizing talent development in the semiconductor sector under the India Semiconductor Mission (ISM). The C2S program aims to enhance training, upskilling, and workforce development to create a strong talent pool for the nation’s growing chip ecosystem.

Vaishnaw mentioned that within the initial four years of the 10-year C2S initiative, significant strides have been made. Notably, top-notch Electronic Design Automation (EDA) tools from renowned global technology firms like Synopsys, Cadence Design Systems, Siemens, Renesas Electronics, Ansys, and AMD have been deployed in 315 academic institutions across India. These tools enable students to gain practical exposure to semiconductor chip design.

The students’ designed chips are undergoing fabrication and testing at the Semiconductor Laboratory (SCL) in Mohali, providing them with hands-on experience throughout the entire process—from design to fabrication, packaging, and testing. The initiative has evolved into the world’s largest open-access EDA program, with over 1.85 crore hours of EDA tool usage recorded for chip design training.

Students from various institutions nationwide, spanning from Assam to Gujarat and from Jammu and Kashmir to Tamil Nadu, are actively engaging in semiconductor design activities. Vaishnaw highlighted the global industry projections, indicating that the semiconductor sector is poised to expand from the current $800–900 billion to nearly $2 trillion. This growth is expected to generate a demand for approximately two million skilled professionals globally, presenting substantial employment prospects for India’s youth.

Furthermore, Vaishnaw disclosed plans for ‘India Semiconductor Mission 2.0,’ which will extend the program from 315 to 500 academic institutions. This expansion aims to bolster the talent pipeline in semiconductor design, fabrication, packaging, and testing across all states.

AMD Ansys Ashwini Vaishnaw Cadence Design Systems Chips to Startups Electronic Design Automation India India Semiconductor Mission Mohali Renesas Electronics Semiconductor Laboratory Siemens Synopsys
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Indian Community Editorial Team

The Indian Community Editorial Team curates, verifies, and publishes stories that matter to Indians worldwide. From culture and community to business and innovation, our mission is to spotlight voices, ideas, and events that bring our global community closer together. Have news or a story to share? Submit it to us at [email protected].

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